general description the MAX4824PMB1 peripheral module provides the nec - essary hardware to interface the max4824 8-channel relay driver to any system that utilizes pmod tm -compatible expansion ports configurable for gpio communication. each independent channel in the ic features a 2.7 i (typ) on-resistance and is guaranteed to sink 70ma (min) of load current. a zener kickback-protection circuit significantly reduces recovery time in applications where switching speed is critical. when driving relays, a unique power-save mode allows relay current to be reduced to a level just above the relay hold-current threshold. this mode keeps the relay activated while significantly reducing the power consumption. refer to the max4824 ic data sheet for detailed informa - tion regarding operation of the ic. features s eight independent output channels capable of 70ma sink current s guaranteed 5 i (max) r on s drive eight relays (or other loads) independently s 4-bit parallel interface (spi version of ic also available) s 12-pin pmod-compatible connector (gpio) s example software written in c for portability s rohs compliant s proven pcb layout s fully assembled and tested MAX4824PMB1 peripheral module _________________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim?s website at www.maxim-ic.com. 19-6320; rev 0; 5/12 ordering information appears at end of data sheet. MAX4824PMB1 peripheral module pmod is a trademark of digilent inc. downloaded from: http:///
designation qty description j1 1 12-pin (2 x 6) right-angle male header j2 1 10-pin (2 x 5) straight male header r1?r8 8 150 i q 5% resistors (0603) u1 1 8-channel relay driver (20 tqfn-ep*)maxim max4824etp+ ? 1 pcb: epcb4824pm1 supplier phone website murata electronics north america, inc. 770-436-1300 www.murata-northamerica.com tdk corp. 847-803-6100 www.component.tdk.com designation qty description c1 1 1 f f q 10%, 10v x7r ceramic capacitor (0603)tdk c1608x7r1a105k c2 1 0.1 f f q 10%, 16v x7r ceramic capacitor (0603)murata grm188r71c104ka01d c3 1 2.2 f f q 10%, 10v x5r ceramic capacitor (0603)tdk c1608x5r1a225k/0.80 pin signal description 1 cs chip-select input. this active-low signal latches in the values of lvl and a2, a1, a0. 2 lvl level input. when latched by cs , this signal determines whether a relay at a given address (a2, a1, a0) is active. 3 a1 a1 input. relay address bit 1. 4 a0 a0 input. relay address bit 0. 5 gnd ground 6 vcc power supply 7 a2 a2 input. relay address bit 2. 8 res reset input. this active-low pin sets all eight relays inactive. 9 set set input. this active-low pin sets all eight relays active. 10 psave reduces coil current to relay hold-current threshold. 11 gnd ground 12 vcc power supply _________________________________________________________________ maxim integrated products 2 MAX4824PMB1 peripheral module component suppliers note: indicate that you are using the MAX4824PMB1 when contacting these component suppliers. component list detailed description gpio interface the MAX4824PMB1 peripheral module can interface to the host by plugging directly into a pmod-compatible port (configured for gpio) through connector j1. j1 provides connection of the module to the pmod host through an interface similar to the pmod type 1 standard recommended by digilent, but incorporates a 12in con - nector with eight i/o pins. see table 1.the j2 connector provides the connection to the open- drain relay outputs. see table 2. software and fpga code example software and drivers are available that execute directly without modification on several fpga develop - ment boards, which support an integrated or synthe - sized microprocessor. these boards include the digilent nexys 3, avnet lx9, and avnet zedboard, although other platforms can be added over time. maxim provides complete xilinx ise projects containing hdl, platform studio, and sdk projects. in addition, a synthesized bit stream, ready for fpga download, is provided for the demonstration application. table 1. connector j1 (gpio communication) * ep = exposed pad. downloaded from: http:///
pin signal description 1 out3 open-drain output 1 2 out2 open-drain output 2 3 out4 open-drain output 3 4 out1 open-drain output 4 5 out5 open-drain output 5 6 out8 open-drain output 6 7 out6 open-drain output 7 8 out7 open-drain output 8 9 gnd ground 10 vcc power supply gn d vc c vc c gn d gn d vc c 15 0 r5 re s a2 lv l a1a0 se t cs gn d vc c gn d rese t 1 cs 2 gn d 7 ou t8 8 ou t7 9 pg nd 10 pg nd 16 ou t6 11 ou t5 12 ps av e 13 ou t4 14 ou t3 15 ou t2 17 ou t1 18 vc c 19 lv l 3 a0 4 a1 5 a2 6 ep se t 20 m ax4 82 4 u1 re s se t a0a1 a2 cslv l psa ve ps av e gn d gn d gn d vc c ou t1 ou t2 ou t3 ou t4 ou t5 ou t6 ou t7 ou t8 gn d 1 2 3 4 5 6 7 8 9 10 11 12 j1 15 0 r6 15 0 r7 15 0 r8 15 0 r1 15 0 r2 15 0 r3 15 0 r4 2. 2u f c3 1u f c1 0. 1u f c2 1 2 3 4 5 6 7 8 9 10 j2 vc c gn d _________________________________________________________________ maxim integrated products 3 MAX4824PMB1 peripheral module the software project (for the sdk) contains several source files intended to accelerate customer evalu - ation and design. these include a base application (maximmodules.c) that demonstrates module function - ality and uses an api interface (maximdevicespecific utilities.c) to set and access maxim device functions within a specific module. the source code is written in standard ansi c format, and all api documentation including theory/operation, register description, and function prototypes are documented in the api interface file (maximdevicespecificutilities.h & .c). the complete software kit is available for download at www.maxim-ic.com . quick start instructions are also available as a separate document. table 2. connector j2 figure 1. MAX4824PMB1 peripheral module schematic downloaded from: http:///
_________________________________________________________________ maxim integrated products 4 MAX4824PMB1 peripheral module figure 2. MAX4824PMB1 peripheral module component placement guide?component sidefigure 3. MAX4824PMB1 peripheral module pcb layout?component side figure 4. MAX4824PMB1 peripheral module pcb layout?inner layer 1 (ground) downloaded from: http:///
_________________________________________________________________ maxim integrated products 5 MAX4824PMB1 peripheral module figure 5. MAX4824PMB1 peripheral module pcb layout?inner layer 2 (power)figure 6. MAX4824PMB1 peripheral module pcb layout?solder side figure 7. MAX4824PMB1 peripheral module component placement guide?solder side downloaded from: http:///
part type MAX4824PMB1# peripheral module _________________________________________________________________ maxim integrated products 6 MAX4824PMB1 peripheral module ordering information # denotes rohs compliant. downloaded from: http:///
revision number revision date description pages changed 0 5/12 initial release ? maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 7 ? 2012 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. MAX4824PMB1 peripheral module revision history downloaded from: http:///
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